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19-2384; Rev 0; 4/02
Differential PECL/ECL/LVPECL/LVECL Receiver/Driver
General Description
The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. The MAX9321B features ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL and LVPECL signals, these devices operate over a +3.0V to +5.5V supply range, allowing high-performance clock and data distribution in systems with a nominal 3.3V or 5.0V supply. For differential ECL and LVECL operation, this device operates from a -3.0V to -5.5V supply. The MAX9321B is offered in industry-standard 8-pin SO and TSSOP packages.
Features
o Improved Second Source of the MC10EP16D o +3.0V to +5.5V Differential PECL/LVPECL Operation o -3.0V to -5.5V Differential ECL/LVECL Operation o Low 17mA Supply Current o 20ps Part-to-Part Skew o 172ps Propagation Delay o Minimum 300mV Output at 3GHz o Output Low for Open Input o ESD Protection >2kV (Human Body Model) o On-Chip Reference for Single-Ended Input
MAX9321B
Applications
Precision Clock Buffer Low-Jitter Data Repeater
PART MAX9321BESA MAX9321BEUA*
Ordering Information
TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 8 SO 8 TSSOP
*Future product--contact factory for availability.
Pin Configuration
D VIH D VIL VBB (CONNECTED TO D)
VCC N.C. 1 80k D2 50k 60k D3 100k VBB 4 5 VEE 6Q 7Q
MAX9321B
8 VCC
Q VOH - VOL Q
VOH VOL
TSSOP/SO
Figure 1. Switching with Single-Ended Inputs
________________________________________________________________ Maxim Integrated Products
1
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Differential PECL/ECL/LVPECL/LVECL Receiver/Driver MAX9321B
ABSOLUTE MAXIMUM RATINGS
VCC to VEE .............................................................................6.0V D or D ...................................................VEE - 0.3V to VCC + 0.3V D or D with the Other Input Floating ....VCC - 5.0V to VCC + 0.3V D to D .................................................................................3.0V Continuous Output Current .................................................50mA Surge Output Current........................................................100mA VBB Sink/Source Current .................................................0.6mA Continuous Power Dissipation (TA +70C) 8-Pin TSSOP (derate 4.5mW/C above +70C) ...........362mW 8-Pin SO (derate 5.9mW/C above +70C)..................471mW Junction-to-Ambient Thermal Resistance in Still Air 8-Pin TSSOP ............................................................+221C/W 8-Pin SO...................................................................+170C/W Junction-to-Ambient Thermal Resistance with 500 LFPM Airflow 8-Pin TSSOP ............................................................+155C/W 8-Pin SO.....................................................................+99C/W Junction-to-Case Thermal Resistance 8-Pin TSSOP ..............................................................+39C/W 8-Pin SO.....................................................................+40C/W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C ESD Protection Human Body Model (D, D, Q_, Q_) .................................>2kV Soldering Temperature (10s) ...........................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC - VEE = 3.0V to 5.5V, outputs loaded with 50 1% to VCC - 2.0V. Typical values are at VCC - VEE = 5.0V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1, 2, 3)
PARAMETER SYMBOL CONDITIONS MIN DIFFERENTIAL INPUT (D, D) Single-Ended Input High Voltage VBB connected to D (VIL for VBB connected to D), Figure 1 VBB connected to D (VIH for VBB connected to D), Figure 1 (Note 4) VCC 1.21 VCC 1.145 VCC 1.085 -40C TYP MAX MIN +25C TYP MAX MIN +85C TYP MAX UNITS
VIH
VCC
VCC
VCC
V
Single-Ended Input Low Voltage High Voltage of Differential Input Low Voltage of Differential Input Differential Input Voltage Input High Current D Input Low Current D Input Low Current
VIL
VEE
VCC 1.61
VEE
VCC 1.545
VEE
VCC 1.485
V
VIHD
VEE + 1.2
VCC
VEE + 1.2
VCC
VEE + 1.2
VCC
V
VILD VIHD VILD IIH IILD IILD VCC - VEE 3.8V VCC - VEE 3.8V VCC - VEE 3.8V VCC - VEE 3.8V
VEE
VCC 0.1 3.0 150
VEE
VCC 0.1 3.0 150
VEE
VCC 0.1 3.0 150
V
0.1
0.1
0.1
V A A A
-100 -140 -150 -175
+100 +140 +150 +175
-100 -140 -150 -175
+100 +140 +150 +175
-100 -140 -150 -175
+100 +140 +150 +175
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Differential PECL/ECL/LVPECL/LVECL Receiver/Driver
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC - VEE = 3.0V to 5.5V, outputs loaded with 50 1% to VCC - 2.0V. Typical values are at VCC - VEE = 5.0V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1, 2, 3)
PARAMETER SYMBOL CONDITIONS MIN DIFFERENTIAL OUTPUT (Q, Q) Single-Ended Output High Voltage Single-Ended Output Low Voltage Differential Output Voltage VOH Figure 1 VCC 1.135 VCC 0.885 VCC 1.07 VCC 0.82 VCC 1.01 VCC 0.76 V -40C TYP MAX MIN +25C TYP MAX MIN +85C TYP MAX UNITS
MAX9321B
VOL VOH VOL
Figure 1
VCC 1.935
VCC 1.68
VCC 1.87
VCC 1.62
VCC 1.81
VCC 1.56
V
Figure 1
550
820
550
820
550
820
mV
REFERENCE (VBB) Reference Voltage Output POWER SUPPLY Supply Current VBB IBB = 0.5mA (Note 5) VCC 1.51 VCC 1.31 VCC 1.445 VCC 1.245 VCC 1.385 VCC 1.185 V
IEE
(Note 6)
16
24
17
24
18
24
mA
AC ELECTRICAL CHARACTERISTICS
(VCC - VEE = 3.0V to 5.5V, outputs loaded with 50 1% to VCC - 2V, input frequency 1.5GHz, input transition time = 125ps (20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to 3.0V. Typical values are at VCC - VEE = 5V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1, 7)
PARAMETER Differential Input-toOutput Delay Part-to-Part Skew SYMBOL tPLHD, tPHLD tSKPP CONDITIONS MIN Figure 2 145 -40C TYP 184 MAX 235 MIN 145 +25C TYP 172 MAX 245 MIN 130 +85C TYP 167 MAX 230 ps UNITS
(Note 8) fIN = 1.5GHz, clock pattern (Note 9)
25 1.7 0.6
90 2.8 1.5
20 1.7 0.6
100 2.8 1.5
20 1.7 0.6
100 2.8
ps
Added Random Jitter
tRJ fIN = 3.0GHz, clock pattern (Note 9) 1.5
ps (RMS)
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Differential PECL/ECL/LVPECL/LVECL Receiver/Driver MAX9321B
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC - VEE = 3.0V to 5.5V, outputs loaded with 50 1% to VCC - 2V, input frequency 1.5GHz, input transition time = 125ps (20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to 3.0V. Typical values are at VCC - VEE = 5V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1, 7)
PARAMETER Added Deterministic Jitter SYMBOL CONDITIONS MIN tDJ 3.0Gpbs 223 - 1 PRBS pattern (Note 9) VOH - VOL 300mV, clock pattern, Figure 2 fMAX VOH - VOL 550mV, clock pattern, Figure 2 2.0 2.0 2.0 -40C TYP 57 MAX 80 MIN +25C TYP 57 MAX 80 MIN +85C TYP 57 MAX 80 ps (P-P) UNITS
3.0
3.0
3.0 GHz
Switching Frequency
Output Rise/ Fall Time (20% to 80%)
tR, tF
Figure 2
65
112
135
65
118
135
65
121
135
ps
Note 1: Measurements are made with the device in thermal equilibrium. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters production tested at TA = +25C. Guaranteed by design and characterization over the full operating temperature range. Note 4: Maximum differential input voltage limit of 3V also applies to single-ended use. Note 5: Use VBB as a reference for inputs on the same device only. Note 6: All pins open except VCC and VEE. Note 7: Guaranteed by design and characterization. Limits are set at 6 sigma. Note 8: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition. Note 9: Device jitter added to the input signal.
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Differential PECL/ECL/LVPECL/LVECL Receiver/Driver
Typical Operating Characteristics
(VCC = 5V, VEE = 0V, input transition time = 125ps (20% to 80%), VIHD = VCC - 1V, VILD = VCC - 1.5V, fIN = 1.5GHz, outputs loaded with 50 to VCC - 2V, TA = +25C, unless otherwise noted.)
MAX9321B
SUPPLY CURRENT, IEE vs. TEMPERATURE
MAX9321B toc01
OUTPUT AMPLITUDE, VOH - VOL vs. FREQUENCY
MAX9321B toc02
TRANSITION TIME vs. TEMPERATURE
125 TRANSITION TIME (ps) 120 115 110 105 100 95 90 tF
MAX9321B toc03
19 18 SUPPLY CURRENT (mA) 17 16 15 14
0.9 0.8 OUTPUT AMPLITUDE (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1
130 tR
13 -40 -15 10 35 60 85 TEMPERATURE (C)
0 0 500 1000 1500 2000 2500 3000 3500 FREQUENCY (MHz)
-40
-15
10
35
60
85
TEMPERATURE (C)
PROPAGATION DELAY vs. HIGH VOLTAGE OF DIFFERENTIAL INPUT, VIHD
MAX9321B toc04
PROPAGATION DELAY vs. TEMPERATURE
MAX9321B toc05
190 VIHD - VILD = 0.5V 185 PROPAGATION DELAY (ps) 180 175 170 165 160 tPHLD tPLHD
210 200 PROPAGATION DELAY (ps) 190 180 170 160 150 tPHLD tPLHD
1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 VIHD (V)
-40
-15
10
35
60
85
TEMPERATURE (C)
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Differential PECL/ECL/LVPECL/LVECL Receiver/Driver MAX9321B
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME N.C. D D VBB VEE Q Q VCC No Connection Noninverting Differential Input. 80k pullup to VCC, 60k pulldown to VEE. Inverting Differential Input. 50k pullup to VCC and 100k pulldown to VEE. Reference Output Voltage. Connect to the inverting or noninverting input to provide a reference for singleended operation. When used, bypass with a 0.01F ceramic capacitor to VCC; otherwise leave open. Negative Supply Voltage Inverting Output. Typically terminate with 50 resistor to VCC - 2V. Noninverting Output. Typically terminate with 50 resistor to VCC - 2V. Positive Supply Voltage. Bypass from VCC to VEE with 0.1F and 0.01F ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. FUNCTION
Detailed Description
The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. For interfacing to differential PECL/LVPECL signals, this device operates over a +3.0V to +5.5V supply range, allowing highperformance clock and data distribution in systems with a nominal 3.3V or 5V supply. For differential ECL/ LVECL operation, this device operates from a -3.0V to -5.5V supply.
Specifications for the high and low voltage of the differential input (VIHD and VILD) and the differential input voltage (VIHD - VILD) apply simultaneously (VILD cannot be higher than VIHD).
Outputs
Output levels are referenced to VCC and are considered PECL/LVPECL or ECL/LVECL, depending on the level of the VCC supply. With VCC connected to a positive supply and VEE connected to GND, the output is PECL/LVPECL. The output is ECL/LVECL when VCC is connected to GND and VEE is connected to a negative supply. A single-ended input of at least VBB 100mV or a differential input of at least 100mV switches the outputs to the VOH and VOL levels specified in the DC Electrical Characteristics table.
Inputs
The differential input can be configured to accept a single-ended input. This is accomplished by connecting the on-chip reference voltage, VBB, to an input as a reference. For example, the differential input is converted to a noninverting, single-ended input by connecting VBB to D and connecting the single-ended input to D. An inverting input is obtained by connecting VBB to D and connecting the single-ended input to D. When using the VBB reference output, bypass it with a 0.01F ceramic capacitor to VCC. If the VBB reference is not used, it can be left open. The VBB reference can source or sink 0.5mA. Use VBB only for an input on the same device as the VBB reference. The maximum magnitude of the differential input from D to D is 3.0V. This limit also applies to the difference between any reference voltage input and a singleended input. The differential input has bias resistors that drive the output to a differential low when the inputs are open. The inverting input is biased with a 50k pullup to VCC and a 100k pulldown to VEE. The noninverting input is biased with an 80k pullup to VCC and a 60k pulldown to VEE.
Applications Information
Supply Bypassing
Bypass VCC to VEE with high-frequency surface-mount ceramic 0.1F and 0.01F capacitors in parallel as close to the device as possible, with the 0.01F value capacitor closest to the device. Use multiple parallel ground vias for low inductance. When using the VBB reference output, bypass it with a 0.01F ceramic capacitor to VCC (if the VBB reference is not used, it can be left open).
Traces
Input and output trace characteristics affect the performance of the MAX9321B. Connect each signal of a differential input or output to a 50 characteristic impedance trace. Minimize the number of vias to prevent impedance discontinuities. Reduce reflections by maintaining the 50 characteristic impedance through connectors and
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Differential PECL/ECL/LVPECL/LVECL Receiver/Driver MAX9321B
D VIHD - VILD D tPLHD Q VOH - VOL Q VOL tPHLD VOH VILD VIHD
80% 0V (DIFFERENTIAL) (Q) - (Q) 20% tR
80% 0V (DIFFERENTIAL) 20% tF
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
across cables. Reduce skew within a differential pair by matching the electrical length of the traces.
Chip Information
TRANSISTOR COUNT: 162
Output Termination
Terminate outputs through 50 to VCC - 2V or use an equivalent Thevenin termination. When a single-ended signal is taken from the differential output, terminate both outputs. For example, when Q is used as a singleended output, terminate both Q and Q.
Package Information
For the latest package outline information, go to www.maximic.com/packages.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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